ANT

BC-ANT-SERIAL

1. Overview

BC-ANT-SERIAL is a module that is equipped with nRF24AP2-8CH, the second generation of ANT chip developed by Nordic Semiconductor. To communicates with a microcontroler (IC), it uses single-end and asynchronous serial communication (1.9V ~ 3.3V RS-232C).

DSCF7967r.JPG
※ ¥100-yen coin is placed for the reference.

2. Specification

  • Absolute Maximum Ratings
    MinimumMaximum
    Supply Voltage (VDD)-0.3V+3.6V
    GND Voltage (VSS)0V
    I/O Terminal Voltage-0.3VLess than 3.6V or VDD + 0.3V
    Operation Temperature (No Condensation)-40℃+85℃
    Storage Temperature (No Condensation)-40℃+85℃
  • Operation Ratings
    ItemsMinimumStandardMaximumUnit • Memo
    Supply Voltage1.93.03.6V
    H level Input Voltage0.7 x VDDVDDV
    L level Input VoltageVSS0.3 x VSSV
    H level Output VoltageVDD – 0.3VDDV
    L level Output VoltageVSS0.3V
    Output Frequency24032480MHz (1MHz steps 78 waves)
    PCB (Length)26.5mm
    PCB (Width)15mm
    PCB (Depth)1mm (Excluding parts)

3. Host Interface

To communicate with a microcontroler, BC-ANT-SERIAL supports single-end and asynchronous serial communication. This ANT module does not support the synchronous mode.

Assignment of pin-headers and pads are shown in the tables below. They are printed in silkscreen on the PCB.

  • Assignment of Pin-Headers
    No.Signal TypeDirectionMemo
    1VDDVoltageAbout Supply Voltage, Please look at “2. Specifications”
    2GNDGND
    3RTSOutputUART communication flow control
    4RXInputUART communication (Receiving at module side)
    5TXOutputUART communication (Transmitting from module side)
  • Assignment of Pads
    Pad NameSignal TypeDirectionMemo
    RSTRESETInputResetting ANT chip
    SUPSUSPENDInputSuspending ANT chip
    SLPSLEEPInputSleeping ANT chip
    BR1BR1InputConfigure UART communication speed1
    BR2BR2InputConfigure UART communication speed2
    BR3BR3InputConfigure UART communication speed3

DSCF7962r2.JPG DSCF7963r2.JPG

The lines of RST, SUP, and SLP are used for tightly managing the activity of ANT chip and increasing energy efficiency of this ANT module.
The lines of BR1, BR2, and BR3 are used for setting the speed of asynchronous serial communication.

[Caution]
In the picture, (a) is the connector, which is specifically used for attaching to the characteristic test antenna. Users are prohibited using this connector. Please do not attach any external antenna to this connector.
In the picture, (b) is the chip antenna. To maintain the characteristics of antenna, do not place any parts nor metric materials around this chip antenna.

About Control Pads

The Size of RST, SUP, SLP, BR1, BR2, and BR3 pads is identical to the size of the chip resistor 1608 pad. To wire to these pads, solder lines to these pads. The function of each line is explained below.

  • RST
    • As ANT chip is electronically reset externally, this pad is used. The line is pulled-up to VDD on the module. To connect to GND (L level), forcefully reset the chip. To wire to this pad, please attach to an open drain output line.
  • SUSPEND
    • This pad is used for suspending ANT chip. The line is pulled-up to VDD on the module. To connect to GND (L level), make the chip suspended. To wire to this pad, please attach to an open drain output line.
  • SLEEP
    • This pad lets ANT chip sleep. This line is pulled-up to VDD level and connected to GND on the module. To use this line, the chip resistor, which is attached to GND is needed to be removed. The removed chip resistor is 1608 size chip resistor, which is located on the parts side near SLP written in silkscreen. Remove this chip resistor, then connect BC-ANT-SERIAL to a microcontroller. To wire this pad, attach to an open drain output line.
  • BR1, BR2, and BR3
    • These lines are pulled-up to VDD. As no resistor is attached, its condition is regarded as H level (1). To configure the communication speed, attach 0Ω (short) of 1608 sized chip resistor. As non of three Pad is attached to the chip resistors, the communication speed is 57200bps. In this case, the communication speed might be too fast for ANT chip. ANT chip may not catch up with serial communication. 38400bps and 19200bps are highly recommended. The table blow shows the configuration patterns and their intended communication speeds. For example, to set the communication speed 38400bps, 0Ω (size 1608) chip resistors are attached to BR1 and BR2.
  • Pads & Communication Speed
    BR1BR2BR3Communication Speed (bps)
    0004800
    00138400
    01019200
    01150000
    1001200
    1019600
    1102400
    11157600
    0: 0Ω resistor is attached
    1: Non

How to Use

(1) How to connect with the serial communication (TXD, RXD, and RTS)
Pin-headers are attached at J1. Please look at Host Interface section fro the pin assignment.
picture3.jpg

From ANT module, RTS is output for controlling hardware flow. This is considered as no-protocol serial communication with hardware flow management. As the microcontroller monitors RTS, it will not stop sending commands if the ANT module is in BUSY. If it does not use hard flow, you can replace hardware flow with another program. As confirming RTS signal is at L, then the commands are send via GPIO port. The datesheet of ANT chip specifies that the delay time between sending a command and sending the signal is at least 50μsec. Actually, to measure the duration, an RTS is sometimes required more than 50μsec to transfer L. To send a command correctly, please check an RTS signal line is at L level. BC-ANT-SERIAL does not have CTS input. In the case of using hardware flow, the microconroller has to receive the reply from the ANT module.

(2) How to Connect Control Lines (Reset, Sleep, and Suspend)
picture4.jpg

To use the lines of RST (reset), SLP (sleep), and SUP (suspend), ANT chip can be managed more efficiently. These lines make it possible that lets ANT chip suspend when there are no communications and/or that forcefully reset ANT chip if it is needed. To utilize the control lines, the ANT module is completely reset, and the energy consumption of the module is possibly reduced.

  • RST (reset)
    • When ANT is in operation, this line is at H level. To reset the ANT chip, the line is shifted to L level. WHen this line is not in use, the line is held at H level. At its default, the line is fixed at H level.
  • SLP (sleep)
    • When ANT is in operation, this line is stayed at H level. If this line is not use, it is fixed at L level. At the default status of this line, the line is kept at L level. As this line is shifted to H, RTS line turns to H, and the ANT module does not accept serial communications. (To let the ANT module accept serial communication, the chip resistor, which is attached to GND, is needed to be removed.)
  • SUP (suspend)
    • As the ANT module is in use, this line is at H level. To use Suspend, SLP is also required. When SUP is only used, SUP cannot be released. Please be careful. To put ANT chip in suspend status, let SLP at H level and stop serial communication first, then SUP is shift down to L level. To releases from suspend status, SUP line is shifted back to H level first, and SLP is turned to L. As suspend is released, all settings of lines are cleared. Please redo the configuration of all channel from the beginning.

Caution and E.T.C.

  • Please do not deface the make of Technical Conformity and the number on this ANT module.
  • Please do not modify and/or alter this module. Once you do, Technical Conformity is void.
  • The connector for the characteristic test antenna is only used for testing. If you use it, Technical Conformity is void.
  • BC-ANR-SERIAL uses lead-free solder. When you solder on this module, please use lead-free solder.

About ANT communication, please look at http://www.thisisant.com
The specification document of ANT protocol is available at This is ANT, The Wireless Sensor Network Solution. Go to DEVELOPER -> DOWNLOADS under RESOURCES. Then select DOCUMENTS tab.
BC-ANT-SERIAL is equipped with nRF24AP2-8CH. 8 channels of ANT connections are available at this module.

Revision History

  • 2013/01/31 This article is initially uploaded

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Last-modified: 2013-01-31 (Thu) 04:12:16 (1751d)