DE0-Nano/Synthesijer_Samples_Serial2
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[[labs.beatcraft.com]]~
[[DE0-Nano]]~
[[Synthesijer]]~
[[DE0-Nano/Synthesijer]]~
[[DE0-Nano/Synthesijer_Samples_Serial1]]~
#Contents
*DE0-Nano/Synthesijer_Samples_Serial2 [#o71172b4]
>
This article explains how to build one set of synthesijer...
~
serial_echo is a sample set, which contains two samples. ...
~
As explained in the article of DE0-Nano/Synthesijer_Sampl...
~
The host PC's serial connection to DE0-Nano is checked by...
(This article do not explain the installation process of ...
** Modify the source files. [#nc98fab7]
>
The following source files of serial_echo are modified. T...
~
Makefile is altered as it is shown below. The target FPGA...
$ vi Makefile
VERILOG_SOURCES = $(SOURCES:.java=.v)
all: hdl exstick
# all: hdl exstick microboard
hdl: $(SOURCES)
>
The frequency of sys_clk, which is denoted in EchoTest,ja...
$ vi EchoTest.java
public class EchoTest{
private final RS232C_RX_Wrapper rx = new RS232C_...
//private final RS232C_RX_Wrapper rx = new RS232...
private final RS232C_TX_Wrapper tx = new RS232C_...
//private final RS232C_TX_Wrapper tx = new RS232...
public void run
>
After the modification is completed, execute make.~
''Caution'': If you already executed the make command, su...
~
$ make
>
Then, create a project file for serial_echo by DE0-Nano. ...
~
Move the created project to Ubuntu. Copy clk_div.vhd, rs2...
~
On Ubuntu, edit EchoTestTop.qsf to match top.vhd, which i...
~
$ vi EchoTestTop.qsf
set_global_assignment -name TOP_LEVEL_ENTITY "top"
#set_global_assignment -name TOP_LEVEL_ENTITY "EchoTestT...
...<Skip>
#=======================================================...
# CLOCK
#=======================================================...
set_location_assignment PIN_R8 -to clk
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" ...
#set_location_assignment PIN_R8 -to CLOCK_50
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL"...
...<Skip>
set_location_assignment PIN_D12 -to rx_din
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" ...
set_location_assignment PIN_B12 -to tx_dout
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" ...
#set_location_assignment PIN_D12 -to GPIO[32]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL"...
#set_location_assignment PIN_B12 -to GPIO[33]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL"...
#=======================================================...
# End of pin assignments by Terasic System Builder
#=======================================================...
set_global_assignment -name VHDL_FILE clk_div.vhd
set_global_assignment -name VHDL_FILE rs232c_rx.vhd
set_global_assignment -name VHDL_FILE rs232c_tx.vhd
set_global_assignment -name VHDL_FILE EchoTest.vhd
set_global_assignment -name VHDL_FILE top.vhd
set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "...
>
GPIO[32] and GPIO[33] on DE0-Nano are connect to the oran...
~
''Caution'': Working with C232HD-DDHSP-0, please attach i...
~
Next, execute Complication on Quartus, check the allocati...
~
To check the operation, check the connection of C232HD-D...
#ref(echotest.png,,50%); ~
>
This is the end of the operation checking of EchoTest of ...
* Revision History [#c6c9eb4c]
>- 2014/12/25 This article is initially uploaded
End:
[[labs.beatcraft.com]]~
[[DE0-Nano]]~
[[Synthesijer]]~
[[DE0-Nano/Synthesijer]]~
[[DE0-Nano/Synthesijer_Samples_Serial1]]~
#Contents
*DE0-Nano/Synthesijer_Samples_Serial2 [#o71172b4]
>
This article explains how to build one set of synthesijer...
~
serial_echo is a sample set, which contains two samples. ...
~
As explained in the article of DE0-Nano/Synthesijer_Sampl...
~
The host PC's serial connection to DE0-Nano is checked by...
(This article do not explain the installation process of ...
** Modify the source files. [#nc98fab7]
>
The following source files of serial_echo are modified. T...
~
Makefile is altered as it is shown below. The target FPGA...
$ vi Makefile
VERILOG_SOURCES = $(SOURCES:.java=.v)
all: hdl exstick
# all: hdl exstick microboard
hdl: $(SOURCES)
>
The frequency of sys_clk, which is denoted in EchoTest,ja...
$ vi EchoTest.java
public class EchoTest{
private final RS232C_RX_Wrapper rx = new RS232C_...
//private final RS232C_RX_Wrapper rx = new RS232...
private final RS232C_TX_Wrapper tx = new RS232C_...
//private final RS232C_TX_Wrapper tx = new RS232...
public void run
>
After the modification is completed, execute make.~
''Caution'': If you already executed the make command, su...
~
$ make
>
Then, create a project file for serial_echo by DE0-Nano. ...
~
Move the created project to Ubuntu. Copy clk_div.vhd, rs2...
~
On Ubuntu, edit EchoTestTop.qsf to match top.vhd, which i...
~
$ vi EchoTestTop.qsf
set_global_assignment -name TOP_LEVEL_ENTITY "top"
#set_global_assignment -name TOP_LEVEL_ENTITY "EchoTestT...
...<Skip>
#=======================================================...
# CLOCK
#=======================================================...
set_location_assignment PIN_R8 -to clk
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" ...
#set_location_assignment PIN_R8 -to CLOCK_50
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL"...
...<Skip>
set_location_assignment PIN_D12 -to rx_din
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" ...
set_location_assignment PIN_B12 -to tx_dout
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" ...
#set_location_assignment PIN_D12 -to GPIO[32]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL"...
#set_location_assignment PIN_B12 -to GPIO[33]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL"...
#=======================================================...
# End of pin assignments by Terasic System Builder
#=======================================================...
set_global_assignment -name VHDL_FILE clk_div.vhd
set_global_assignment -name VHDL_FILE rs232c_rx.vhd
set_global_assignment -name VHDL_FILE rs232c_tx.vhd
set_global_assignment -name VHDL_FILE EchoTest.vhd
set_global_assignment -name VHDL_FILE top.vhd
set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "...
>
GPIO[32] and GPIO[33] on DE0-Nano are connect to the oran...
~
''Caution'': Working with C232HD-DDHSP-0, please attach i...
~
Next, execute Complication on Quartus, check the allocati...
~
To check the operation, check the connection of C232HD-D...
#ref(echotest.png,,50%); ~
>
This is the end of the operation checking of EchoTest of ...
* Revision History [#c6c9eb4c]
>- 2014/12/25 This article is initially uploaded
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