DE0-Nano/Synthesijer_Samples_LED
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[[labs.beatcraft.com]]~
[[DE0-Nano]]~
[[Synthesijer]]~
[[DE0-Nano/Synthesijer]]~
#Contents
* DE0-Nano/Synthesijer_Samples_LED [#qb4fa3c4]
>
This article explains how to compile a sample program, le...
~
This article basically uses the same sample program as th...
~
In the led directory there is the make file. Then, build ...
~
$ cd ~/synthesijer_samples/sample/led/
$ make
java -cp /home/beat/synthesijer-20140818.jar synthesijer...
Output VHDL: counter.vhd
Output VHDL: led.vhd
Output Verilog HDL: counter.v
Output Verilog HDL: led.v
javac -cp /home/beat/synthesijer-20140818.jar:. led_top....
java -cp /home/beat/synthesijer-20140818.jar:. led_top
~
Create a project file on DE0-Nano System Builder. To be c...
~
Move the created project file to Ubuntu. Change the name ...
On Ubuntu, edit led_top.qsf for matching led_top.vhd. led...
~
As exstick.ucf is defined, the pin-allocation is not spec...
~
$ vi exstick.ucf
NET reset LOC = A12 | IOSTANDARD = LVCMOS33; # ...
NET reset TIG;
NET clk LOC = N7 | IOSTANDARD = LVCMOS33; ...
NET clk TNM_NET = clk;
TIMESPEC ts_clk = PERIOD clk 25000 kHz;
NET q LOC = A2 | IOSTANDARD = LVCMOS33;
~
$ vi led_top.vhd
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;
entity led_top is
port (
clk : in std_logic;
reset : in std_logic;
q : out std_logic
);
end led_top;
...<Skip>
~
$ vi led_top.qsf
...<Skip>
#=======================================================...
# CLOCK
#=======================================================...
set_location_assignment PIN_R8 -to clk
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" ...
# set_location_assignment PIN_R8 -to CLOCK_50
# set_instance_assignment -name IO_STANDARD "3.3-V LVTTL...
#=======================================================...
# LED
#=======================================================...
set_location_assignment PIN_A15 -to q
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" ...
#set_location_assignment PIN_A15 -to LED[0]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL"...
...<Skip>
#=======================================================...
# End of pin assignments by Terasic System Builder^M
#=======================================================...
^M
set_global_assignment -name VHDL_FILE led.vhd^M
set_global_assignment -name VHDL_FILE counter.vhd^M
set_global_assignment -name VHDL_FILE led_top.vhd^M
set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "...
>
Then, the rest of steps is identical to what describes in...
~
Start up Quartus, and select Top.qpf from Open Project in...
$ quartus
~
- Error message 1~
Click Start Complication in Processing at the menu bar.~
Start compiling the files, which are created in the proje...
~
''Caution'': A lot of Warning will appear. But, there are...
>
Click Pin Planner in Assignments section. Then, make sure...
~
- Error message 2~
Click Programmer in Tools section at the menu bar. Progra...
~
If the screen indicates No Hardware, click Hardware Setti...
~
''Caution'': If the choice of USB-Blaster is not be displ...
>
As all process has been completed. Click Start, which is ...
As progress reaches at 100% (successful), LED0 on DE0-Nan...
~
>
#ref(quartus003.png,,60%);~
~
>
#youtube(ghHBbJ3bLk8); ~
~
This is the end of operation check on quickstart.~
* Revision History [#j745fcc1]
>
- 2014/12/25 This article is initially uploaded~
End:
[[labs.beatcraft.com]]~
[[DE0-Nano]]~
[[Synthesijer]]~
[[DE0-Nano/Synthesijer]]~
#Contents
* DE0-Nano/Synthesijer_Samples_LED [#qb4fa3c4]
>
This article explains how to compile a sample program, le...
~
This article basically uses the same sample program as th...
~
In the led directory there is the make file. Then, build ...
~
$ cd ~/synthesijer_samples/sample/led/
$ make
java -cp /home/beat/synthesijer-20140818.jar synthesijer...
Output VHDL: counter.vhd
Output VHDL: led.vhd
Output Verilog HDL: counter.v
Output Verilog HDL: led.v
javac -cp /home/beat/synthesijer-20140818.jar:. led_top....
java -cp /home/beat/synthesijer-20140818.jar:. led_top
~
Create a project file on DE0-Nano System Builder. To be c...
~
Move the created project file to Ubuntu. Change the name ...
On Ubuntu, edit led_top.qsf for matching led_top.vhd. led...
~
As exstick.ucf is defined, the pin-allocation is not spec...
~
$ vi exstick.ucf
NET reset LOC = A12 | IOSTANDARD = LVCMOS33; # ...
NET reset TIG;
NET clk LOC = N7 | IOSTANDARD = LVCMOS33; ...
NET clk TNM_NET = clk;
TIMESPEC ts_clk = PERIOD clk 25000 kHz;
NET q LOC = A2 | IOSTANDARD = LVCMOS33;
~
$ vi led_top.vhd
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;
entity led_top is
port (
clk : in std_logic;
reset : in std_logic;
q : out std_logic
);
end led_top;
...<Skip>
~
$ vi led_top.qsf
...<Skip>
#=======================================================...
# CLOCK
#=======================================================...
set_location_assignment PIN_R8 -to clk
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" ...
# set_location_assignment PIN_R8 -to CLOCK_50
# set_instance_assignment -name IO_STANDARD "3.3-V LVTTL...
#=======================================================...
# LED
#=======================================================...
set_location_assignment PIN_A15 -to q
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" ...
#set_location_assignment PIN_A15 -to LED[0]
#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL"...
...<Skip>
#=======================================================...
# End of pin assignments by Terasic System Builder^M
#=======================================================...
^M
set_global_assignment -name VHDL_FILE led.vhd^M
set_global_assignment -name VHDL_FILE counter.vhd^M
set_global_assignment -name VHDL_FILE led_top.vhd^M
set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "...
>
Then, the rest of steps is identical to what describes in...
~
Start up Quartus, and select Top.qpf from Open Project in...
$ quartus
~
- Error message 1~
Click Start Complication in Processing at the menu bar.~
Start compiling the files, which are created in the proje...
~
''Caution'': A lot of Warning will appear. But, there are...
>
Click Pin Planner in Assignments section. Then, make sure...
~
- Error message 2~
Click Programmer in Tools section at the menu bar. Progra...
~
If the screen indicates No Hardware, click Hardware Setti...
~
''Caution'': If the choice of USB-Blaster is not be displ...
>
As all process has been completed. Click Start, which is ...
As progress reaches at 100% (successful), LED0 on DE0-Nan...
~
>
#ref(quartus003.png,,60%);~
~
>
#youtube(ghHBbJ3bLk8); ~
~
This is the end of operation check on quickstart.~
* Revision History [#j745fcc1]
>
- 2014/12/25 This article is initially uploaded~
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