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*Synthesijer [#od4b5dd4]
>
Synthesijer is a high-level synthesis language, which generates VHDL and Verilong HDL code form Java code, and~
this is the successor of JavaRock. The articles listed below show how to generate image, how to write the image to~
a FPGA board, and how to run the images of these samples on a FPGA board.

** DE0-Nano [#y4ba3090]
>
DE0-Nano is a FPGA board of Terasic Technologies Inc. This board is used for the quick start as well as other samples.
#ref(DE0Nano.jpg,,40%); ~

* Articles [#me92bd25]
** Set up: Preparation (DE0-Nano/Synthesijer) [#la56c35c]
>
This article explains the set-up for Synthesijer. A virtual machine is installed on a Windows PC, and the most synthesijer~
related operations are done on this virtual machine. 
related operations are done on this virtual machine.~

** Quick Start [#p71887fd]
>
In the environment that created at DE0-Nano/Synthesijer, create quickstart of sythesijer_samples. Then, execute the created~
image of the sample on DE0-Nano.
image of the sample on DE0-Nano.~
~
For its details, please visit [[DE0-Nano/Synthesijer]].~

For its details, please visit [[DE0-Nano/Synthesijer]].

** Samples [#w28a6f73]
>
In the environment that created at [[DE0-Nano/Synthesijer]], create few programs of sythesijer_samples. Then, execute the created~
images of the samples on DE0-Nano.~
~
- LED~
This sample program let a LED blink on DE0-Nano.~
For its details, please go to [[DE0-Nano/Synthesijer_Samples_LED]].~
~
- Serial_Echo (ToUpper)~
This sample is one program of a program set (Serial_Echo). This sample program converts the typed letters in upper case~
on the serial monitor program. For its details, please visit [[DE0-Nano/Synthesijer_Samples_Serial1]].~
~
- Serial_Echo (EchoTest)~
This sample is a program of a program set (Serial_Echo). This sample program repeats the input letters on the serial monitor.~
For its details, please visit [[DE0-Nano/Synthesijer_Samples_Serial2]].~

* Revision History [#sa3633b9]
> 
- 2014/12/24 This article is initially published

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